参考文献
| [1] | Cheng Y.Design for manufacturing (DFM) in nano-CMOS era.IEEE International Nanoelectronics Conference,2008:524 |
| [2] | Bastos J,Marques A M,Steyaert M S J,et al.A 12-bit intrinsic accuracy high-speed CMOS DAC.IEEE J Solid-State Circuits,1998,33(12):1959 |
| [3] | Plas G,Vandenbussche J,Sansen W,et al.A 14-bit intrinsic accuracy Q2 random walk CMOS DAC.IEEE J Solid-State Circuits,1999,34(12):1708 |
| [4] | Luschas S,Lee H S.Output impedance requirements for DACs.IEEE ISCAS,2003:861 |
| [5] | Chen T,Gielen G G E.The analysis and improvement of a current-steering DACs dynamic SFDR-Ⅰ:the cell-dependent delay differences.IEEE Trans Circuits Syst Ⅰ,2006,53(1):3 |
| [6] | Cheng L,Lin Y,Ye F,et al.Output-dependent delay cancellation technique for high-accuracy current-steering DACs.IEEE ISCAS,2012:2729 |
| [7] | Palmers P,Steyaert M S J.A 10-bit 1.6-GS/s 27-mW currentsteering D/A converter with 550-MHz 54-dB SFDR bandwidth in 130-nm CMOS.IEEE Trans Circuits Syst Ⅰ,2010,57(11):2870 |
| [8] | Mercer D A.Low-power approaches to high-speed currentsteering digital-to-analog converters in 0.18-μm CMOS.IEEE J Solid-State Circuits,2007,42(8):1688 |
| [9] | Tesch B J,Pratt P M,Bacrania K,et al.A 14-b,125 MSPS digitalto-analog converter and bandgap voltage reference in 0.5 μm CMOS.IEEE ISCAS,1999:452 |
| [10] | Lewyn L L,Ytterdal T,Wulff C,et al.Analog circuit design in nanoscale CMOS technologies.Proc IEEE,97(10):1687 |
| [11] | Analog Device.Data Sheet:ADV7123 CMOS,330 MHz,triple 10-bit high speed video DAC.2010 |
| [12] | Chou W S,Yang S C,Hsueh F L,et al.A low-cost triple-channel 10-bit 250 MHz DAC IP in 65 nm CMOS process.IEEE ISCAS,2007:3594 |
| [13] | Zhao Q,Li R,Qiu D,et al.A 14-bit 1-GS/s DAC with a programmable interpolation filter in 65 nm CMOS.Journal of Semiconductors,2013,34(2):025004 |
上一张
下一张
上一张
下一张
计量
- 下载量()
- 访问量()
文章评分
- 您的评分：
-
10%
-
20%
-
30%
-
40%
-
50%