参考文献
| [1] | Rabaey J M.Digital integrated circuits:a design perspective.Prentice-Hall,Englewood Cliffs,N.J.,1996 |
| [2] | Bakoglu H B.Circuits,interconnections and packaging for VLSI.Reading,MA:Addison-Wesley,1990 |
| [3] | Elgamel M A,Bayoumi M A.Interconnect noise analysis and optimization in deep submicron technology.IEEE Circuits Syst Mag,2003,Fourth Quarter:6 |
| [4] | Agarwal K,Sylvester D,Blaauw D.Modeling and analysis of crosstalk noise is coupled RLC interconnects.IEEE Trans Computer-Aided Design of Integrated Circuits and Systems,2006,25(5):892 |
| [5] | Kaushik B K,Sarkar S,Agarwal R P,et al.Effect of line resis-tance and driver width on crosstalk in coupled VLSI interconnects.Microelectronics International,2007,24(3):42 |
| [6] | Roy A,Mohmoud N,Chowdhury M H.Effects of coupling ca-pacitance and inductance on delay uncertainty and clock skew.Design Automation Conf,2007:184 |
| [7] | Kang S M,Leblebici Y.CMOS digital integrated circuits-analysis and design.TMH,New York,2003 |
| [8] | Roy A,Xu J,Chowdhury M H.Analysis of the impacts of signal slew and skew on the behavior of coupled RLC interconnects for different switching patterns.IEEE Trans VLSI Syst,2010,18(2):338 |
| [9] | Kaushik B K,Sarkar S,Agarwal R P,et al.Crosstalk analysis and repeater insertion in crosstalk aware coupled VLSI interconnects.Microelectronics International,2006,23(3):55 |
| [10] | Sharma D K,Kaushik B K,Sharma R K.Effect of equal and mismatched signal transition time on power dissipation in global VLSI interconnects.International Journal of VLSI Design and Communication Systems,2012,3(4):111 |
| [11] | Sharma D K,Kaushik B K,Sharma R K.Effect of coupling parasitics and CMOS driver width on transition time for dynamic inputs.International Journal of Electronics,2013,DOI:10.1080/00207217.2013.794485 |
| [12] | Li X C,Mao J F,Swaminathan M.Transient analysis of CMOS-gate driven RLCG interconnects based on FDTD.IEEE Trans Computer-Aided Design of Integrated Circuits and Systems,2011,30(4):574 |
| [13] | Afrooz K,Abdipour A,Tavakoli A,et al.Time domain analysis of lossy nonuniform transmission line using FDTD technique.Proc Asia-Pacific Conf Applied Electromagnetics,2007 |
| [14] | Sharma D K,Mittal S,Kaushik B K,et al.Dynamic crosstalk analysis in RLC modeled interconnects using FDTD method.IEEE Intl Conf Computer and Communication Technology (ICCCT),2012:326 |
| [15] | Ismail Y I,Friedman E G.Figures of merit to characterize the importance of on-chip inductance.IEEE Trans VLSI Syst,1999,7(4):442 |
| [16] | Deutsch A,Kopcsay G V,Restle P J,et al.When are transmission-line effects important for on-chip interconnections.IEEE Trans Microw Theory Tech,1997,45(10):1836 |
| [17] | Paul C R.Analysis of multiconductor transmission lines.NY∶Wily Interscience,1994 |
| [18] | Paul C R.Incorporation of terminal constraints in the FDTD analysis of transmission lines.IEEE Trans Electromag Compatibility,1994,36(2):85 |
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