高介电栅介质材料研究进展

无机材料学报, 2008, 23(5): 865-871. doi: 10.3321/j.issn:1000-324X.2008.05.001

高介电栅介质材料研究进展

武德起 ^1, , 赵红生 ^2, , 姚金城 ^3, , 张东炎 ^4, , 常爱民 ^5,

1.中国科学院,新疆理化技术研究所,乌鲁木齐,830011;中国科学院北京半导体所,北京100038;中国科学院,研究生院,北京,100049

2.中国科学院,新疆理化技术研究所,乌鲁木齐,830011;中国科学院北京半导体所,北京100038;中国科学院,研究生院,北京,100049

3.中国科学院,新疆理化技术研究所,乌鲁木齐,830011

4.中国科学院,新疆理化技术研究所,乌鲁木齐,830011;中国科学院,研究生院,北京,100049

5.中国科学院,新疆理化技术研究所,乌鲁木齐,830011

基金项目: 国家自然科学基金(50372083) 中国科学院知识创新工程青年人才领域前沿项目(072C201301)

关键词：高介电栅介质 , 晶化温度 , 低介电界面层 , 金属栅电极

Development of High-K Gate Dielectric Materials

传统的栅介质材料SiO2不能满足CMOS晶体管尺度进一步缩小的要求,因此高介电栅介质材料在近几年得到了广泛的研究,进展迅速,本文综述了国内外对高介电材料的研究成果,并结合作者的工作介绍了高介电栅介质在晶化温度、低介电界面层、介电击穿和金属栅电极等方面的最新研究进展.

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高介电栅介质材料研究进展

Development of High-K Gate Dielectric Materials

参考文献