介绍了一种新的金属诱导多晶硅技术.该技术的核心是预设规则化晶核定位孔和镍源补充孔与溶液浸蘸技术的结合.以定位孔为晶化的起始点,晶化过程中消耗的镍可通过分布在周边的镍源补充孔中的镍给予补充.这样可以大大降低晶核定位孔中的初始镍量,使整个多晶硅薄膜中不存在明显的高镍含量区.即包括晶核定位孔、镍源补充孔在内的整个多晶硅薄膜区域内,能形成连续晶畴的多晶硅薄膜,都可作为高质量TFT的有源层.根据晶核定位孔分布形式的不同,可以设计成规则、重复的分布形式,获得正六边形的蜂巢晶体薄膜和准平行晶带晶体薄膜.这些规则形成的晶畴形状与尺寸相同,可准确地控制晶化的过程,具有晶化时间的高可控性和工艺过程的高稳定性,故而适合于工业化生产的要求.利用些技术,当温度为590℃时,可将晶化时间缩短至2 h之内.用这种多晶硅薄膜为有源层,所得多晶硅TFT的场效应迁移率典型值为～55 cm2/V·s,亚阈值斜摆幅为0.6 V/dec,开关电流比为～1×107,开启电压为-3 V.
A new technique has been proposed to define and control the grain boundaries and domains of low temperature polycrystalline silicon (LTPS) films. It can be realized by combination of the solution process and the provision of nucleation sites (NS) and supplemental sites (SS). As a result, the crystallized poly-Si film has a much lower nickel concentration as compared to traditional metal induced lateral crystallization (MILC) poly-Si. High performance TFTs are obtained regardless of the position of the grain boundaries. Different shapes of domains can be obtained corresponding to different distributions of the NS and SS. Among the optimal designs, a honeycomb-like structure and a unidirectional structure are the most typical and practical. With the repeatedly regular distribution of the NS and the SS, domains of the same shape and size can be achieved. This process is precisely controllable and the crystallization time can be reduced to about 2 h at the annealing temperature of 590 ℃. The fabricated P-channel defined-grain (DG) poly-Si TFTs exhibited a maximum field effect mobility (μFE of ～55 cm2/V·s, a subthreshold swing (S) of～0.6 V/dec and a threshold voltage (Vth) of-3 V. The ratio of on-state to off-state drain currents is ～1×107.
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